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 | THURSDAY, June 10, 2004, 02:00 PM - 05:00 PM | Room: 11
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| | HoT Structured ASICs
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| | Designing A Structured ASIC through FPGA Prototyping - Altera Corp. and Synopsys, Inc.
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| | Organizer(s): King Ou
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| |  Synopsys has collaborated with Altera to minimize the transition from FPGA prototyping to production. With FPGA prototyping, the customer has the option to continue production with FPGAs, migrate directly to Altera's HardCopy structured ASIC or transition to a more traditional ASIC. The anchor of the design flow is DC-FPGA which allows a customer to design directly to an FPGA or an Altera's HardCopy structured ASIC. FPGA prototype to ASIC conversion is facilitated by script and constraint compatibility between DC-FPGA and the extremely popular DC. This Hands-On Tutorial will guide the attendee from RTL to an Altera HardCopy structure ASIC prototype utilizing the Synopsys design environment.
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